1. Technical Field
Various embodiments generally relate to a semiconductor apparatus, and more particularly, to a stacked semiconductor memory apparatus in which a plurality of chips are stacked.
2. Related Art
To improve the integration density of a semiconductor apparatus chips may be stacked and packaged making a 3D (three-dimensional) semiconductor apparatus. However, 3D semiconductor apparatuses have a maximum integration density limit.
One method of creating a 3D semiconductor apparatus is to implement a plurality of chips having the same structure by stacking them and connecting them all together with metal wires that are peripheral to the chips. With this configuration the plurality of chips may operate as a single semiconductor apparatus.
Another method of creating a 3D semiconductor apparatus is to implement TSV (through-silicon via) which pass through the plurality of stacked chips to electrically connect the chips. However, manufacturing 3D semiconductor apparatus that implement TSVs are subject to processing skews which may prevent the stacked chips from sequentially operating.